`module encoder8_3(S,I7,I6,I5,I4,I3,I2,I1,I0,Y2,Y1,Y0,YS,YEX);
input S,I7,I6,I5,I4,I3,I2,I1,I0;
output Y2,Y1,Y0,YS,YEX;
reg Y2,Y1,Y0,YS,YEX;
always @(S,I7,I6,I5,I4,I3,I2,I1,I0)
begin if (S)
begin
Y2=1’b1;Y1=1’b1;Y0=1’b1;YS=1’b1;YEX=1’b1;
end
else
if(I7&&I6&&I5&&I4&&I3&&I2&&I1&&I0)
begin
Y2=1’b1;Y1=1’b1;Y0=1’b1;YS=1’b1;YEX=1’b1;
end
else if(!I7)
begin
Y2=1’b1;Y1=1’b1;Y0=1’b1;YS=1’b1;YEX=1’b0;
end
else if(!I6)
begin
Y2=1’b1;Y1=1’b1;Y0=1’b0;YS=1’b1;YEX=1’b0;
end
else if(!I5)
begin
Y2=1’b1;Y1=1’b0;Y0=1’b1;YS=1’b1;YEX=1’b0;
end
else if(!I4)
begin
Y2=1’b1;Y1=1’b0;Y0=1’b0;YS=1’b1;YEX=1’b0;
end
else if(!I3)
begin
Y2=1’b0;Y1=1’b1;Y0=1’b1;YS=1’b1;YEX=1’b0;
end
else if(!I2)
begin
Y2=1’b0;Y1=1’b1;Y0=1’b0;YS=1’b1;YEX=1’b0;
end
else if(!I1)
begin
Y2=1’b0;Y1=1’b0;Y0=1’b1;YS=1’b1;YEX=1’b0;
end
else if(!I0)
begin
Y2=1’b0;Y1=1’b0;Y0=1’b0;YS=1’b1;YEX=1’b0;
end
else
begin Y2=1’b0;Y1=1’b0;Y0=1’b0;YS=1’b0;YEX=1’b0;
end
end
endmodule`